Semiconductor memory may be roughly classified into volatile and non-volatile memory devices. Data stored in volatile memory devices is lost when applied power is interrupted, while data stored in non-volatile memory devices is retained under similar conditions.
Flash memory is one type of a non-volatile memory. As computer systems and consumer electronics have become increasingly portable, flash memory has been increasingly used in the implementation of such devices. That is, flash memory has several advantages over other types of memory, such as lower power consumption, higher integration, smaller size, reduced weight, etc. In certain applications, such as portable information appliances including mobile phones, PDAs, digital cameras, etc., flash memory devices have increasingly been used as storage devices instead of hard disk drives.
However, unlike conventional hard disk drive units, flash memory does not readily support a flexible data overwrite function. That is, it is impossible to update previously stored data on less than a defined block-size basis. Accordingly, an erase operation must be performed prior to the programming of data to the flash memory. This approach is commonly referred to as an ‘erase-before-program’ operation. Using this approach, a flash memory device (or more particularly, a sub-set of the memory cells forming a flash memory device) must be reset to an initial state (e.g., an erase state) prior to programming data.
The erase operation necessitated by this approach requires a longer execution period than the corresponding program operation. Further, since the erase unit (i.e., a defined “block” size) for the flash memory device is generally larger than the corresponding program unit (i.e., a defined “page” size), excess data is inevitably erased and must be restored during a subsequent program operation.
A translation layer (e.g., a Flash Translation Layer or FTL in the context of a flash memory) is specially provided software that is used to address the disadvantages described above. In effect, the FTL allows for the efficient management of data space in a flash memory device by translating logical addresses (LA) from a working file system into corresponding physical addresses (PA). This translation process is commonly referred to as address mapping. For reference purposes hereafter, a logical address LA is an address defined by a file system running on a host device, and a physical address PA is an address defined in relation to the memory cell ordering within a flash memory device.
In many embodiments, the FTL includes an address mapping table managing the address mapping operation. The address mapping table may be loaded to a random access memory (RAM) associated with (or operating in conjunction with) the flash memory device. The address mapping table may be used to store mapping information between corresponding logical and physical addresses. The size of the address mapping table and a mapping manner may be defined in relation to a mapping unit. The host device may recognize the flash memory device as a hard disk drive according to the defined address mapping scheme. Once recognized in this manner, the host device may access the flash memory device as if it were a hard disk drive of conventional design.
Conventionally understood mapping methods include page mapping, block mapping, and hybrid mapping methods. The page mapping method generally requires a page mapping table used to perform a mapping operation according to a defined page unit and to store mapping information between corresponding logical and physical pages. The block mapping method generally requires a block mapping table used to conduct a mapping operation according to a defined block unit and to store mapping information between corresponding logical and physical blocks. The hybrid mapping method may utilize the page and block mapping methods at the same time.
In general, a memory block may consist of several tens or hundreds of pages. For this reason, if the page mapping method is used, the corresponding size of the page mapping table may become excessive as compared with the block mapping method. In other words, the page mapping method may require a much larger memory space for its mapping table.
In contrast, the block mapping method implementing a mapping operation according to a block unit is capable of reducing the size of the corresponding mapping table as compared with the page mapping method. However, since page positions to be written in a block are fixed, many more merge operations may need to be performed.
The hybrid mapping method may utilize the page mapping method with respect to log blocks and the block mapping method with respect to data blocks. Since the hybrid mapping method uses the two mapping methods, a size of a mapping table and the number of merge operations may be reduced.
When a write operation is performed using the hybrid mapping method, page data to be stored in a data block is first stored in a log block, and previous data of a data block is marked as invalid. As the write operation(s) is (are) performed, the resulting “invalid region” may increase in size. Since data may not be stored in the invalid region, the overall data storage capacity of the flash memory device is reduced. In order to maintain an acceptable data storage capacity for the flash memory device, valid pages are gathered within a new data block, and invalid pages are erased. This approach is commonly referred to as a merge operation.
Each merge operation will generally require a plurality of page program operations and a plurality of block erase operations. Thus, merge operations tend to be relatively long. As the number of necessary merge operations increases, the overall performance of a memory system incorporating the constituent flash memory deteriorates.